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Ordering number : EN*5793
CMOS IC
LC378000RP
Internally Synchronized Silicon Gate 8M (1,048,576word x 8-bit, 524,288-word x 16-bit) Mask ROM
Preliminary Overview
The LC378000RP is an 8-Mbit mask ROM that can be switched between byte mode, which provides an 8-bit x 1,048,576-word structure, and word mode, which provides a 16-bit x 524,288-word structure. Since this device operates over the wide supply voltage range of 2.6 to 5.5 V and achieves access times (tAA) of 100 ns (at VCC = 4.5 to 5.5 V) and 200 ns (at VCC = 2.6 to 5.5 V), it can be used in a wide range of systems, from 5-V systems requiring high-speed access to 3-V battery operated systems.
Package Dimensions
unit: mm 3014A-DIP42
[LC378000RP]
Features
* Supply voltage range: 2.6 to 5.5 V * Access time (tAA): 100 ns (VCC = 4.5 to 5.5 V) (tCA): 110 ns (VCC = 4.5 to 5.5 V) 200 ns (VCC = 2.6 to 5.5 V) * Switchable between 8-bit and 16-bit data path widths Byte mode: 1,048,576 words x 8 bits Word mode: 524,288 words x 16 bits * Operating current drain: 90 mA (maximum) * Standby current: 30 A (maximum) * Fully static operation (internal synchronization) * Three-state outputs * Package: 42-pin DIP (600 mil) plastic package
SANYO: DIP42
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
42098RM (OT) No. 5793-1/4
LC378000RP Pin Assignment Pin Functions
A0 to A19 D0 to D15/A-1 CE OE BYTE VCC VSS Address inputs Data outputs Chip enable input Output enable input Byte/word mode switching Power Ground
D15/A-1:In byte mode, this pin functions as the A-1 address input, and in word mode, it functions as the D15 data output pin.
Block Diagram
Row decoder
Memory array
Address buffer
Column decoder + bias circuit
CE buffer
Internal timing generator
Sense amplifier
BYTE buffer
A-1 buffer
Byte/word output switching circuit
OE buffer
Output buffer
Function Logic Table
CE H L L H L L OE X H L X H L BYTE L L L H H H Output pin state High impedance High impedance DOUT x 8 (BYTE MODE)* High impedance High impedance DOUT x 16 (WORD MODE) Current drain Standby mode level Operating mode level Operating mode level Standby mode level Operating mode level Operating mode level
Note: X: A high-level or low-level input D8 to 14 are high impedance and D15 functions as the A-1 address input.
No. 5793-2/4
LC378000RP
Specifications
Absolute Maximum Ratings*
Parameter Supply voltage Input pin voltage Output pin voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC VIN VOUT Pd max Topr Tstg Ta = 25C Conditions Ratings -0.3 to +7.0 -0.3* to VCC + 0.3 -0.3 to VCC + 0.3 1.0 -10 to +70 -55 to +125 Unit V V V W C C
Note: Application of stresses greater than or equal to the maximum ratings may lead to device destruction. *: Minimum value minus 3.0 V for pulses with widths of 30 ns or less.
Capacitance Characteristics* at Ta = 25C, f = 1.0 MHz
Parameter Input pin capacitance Output pin capacitance Symbol CIN COUT Conditions VIN = 0 V. Reference value using the Sanyo DIP. VOUT = 0 V. Reference value using the Sanyo DIP. Ratings min typ max 8 10 Unit pF pF
Note: These parameters are not tested in all units, but rather are sampled in a subset of units produced.
DC Allowable Operating Ranges at Ta = -10 to +70C
Parameter Supply voltage Input high-level voltage Input low-level voltage Symbol VCC max VIH VIL Conditions Ratings min 2.6 2.2 -0.3 typ 5.0 max 5.5 VCC + 0.3 0.6 Unit V V V
DC Electrical Characteristics at Ta = -10 to +70C, VCC = 2.6 to 5.5 V
Parameter Symbol ICCA1 ICCA2 ICCS1 ICCS2 ILI ILO VOH VOL Conditions CE = 0.2 V, VI = VCC - 0.2 V/0.2 V CE = VIL, IO = 0 mA, VI = VIH/VIL, f = 10 MHz CE = VCC - 0.2 V CE = VIH VIN = 0 to VCC CE or OE = VIH, VOUT = 0 to VCC IOH = -0.5 mA IOL = 0.5 mA 0.8 VCC 0.2 Ratings min typ max 30 90 30 (1.0) 1.0 (0.3) 1.0 1.0 Unit mA mA A mA A A V V
Operating current drain
Standby current drain Input leakage current Output leakage current Output high-level voltage Output low-level voltage
Note: Values in parentheses are guaranteed at Ta = 25C.
AC Characteristics at Ta = -10 to +70C, VCC = 2.6 to 5.5 V
Parameter Cycle time Address access time CE enable time CE access time OE access time Output hold time Output disable time* Symbol tCYC tAA tCEON tCA tOA tOH tOD 20 100 200 (135) 200 (110) 100 (40) Conditions Ratings min 200 (100) 200 (100) typ max Unit ns ns ns ns ns ns ns
Note: tOD is stipulated as the time from the rise of either CE or OE (whichever occurs first) to the point when the output goes to the high-impedance state. These parameters are not tested in all units, but rather are sampled in a subset of units produced. Values in parentheses are for VCC = 4.5 to 5.5 V.
No. 5793-3/4
LC378000RP Test Conditions
Input voltage amplitude Rise and fall times Input discrimination level Output discrimination level Output load 0.4 V to 2.8 V 5 ns 1.5 V 1.5 V See figure.
*: Includes the oscilloscope and jig capacitances.
Output Load Timing Waveforms
Address input
tCEON
Data output
Note: Items in parentheses are for byte mode operation.
Notes on System Design This IC adopts the ATD technique, in which operation starts when a change in either the CE or address inputs is detected. This means that the output data immediately after power is applied is invalid. When using this IC as program memory for the Z80 and similar microprocessors, applications must take into account the fact that valid data will not be output after power is first applied unless the value of either the CE line or at least one of the address lines is changed after the power supply has stabilized. Another point due to the use of the ATD technique is that this IC is sensitive to input noise. Do not apply voltages outside the allowable DC input levels for extended periods and do not apply input voltages with large noise components.
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of April, 1998. Specifications and information herein are subject to change without notice. PS No. 5793-4/4

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